Reduced instruction set computer

Results: 224



#Item
51Computer engineering / Parallel computing / Superscalar / Central processing unit / Reduced instruction set computing / Instruction-level parallelism / Computing / Computer architecture / Classes of computers

Beyond Claims of Free Transistors and Abundant Instruction-Level Parallelism Michael D. Smith STANFORD UNIVERSITY

Add to Reading List

Source URL: www.hotchips.org

Language: English - Date: 2013-07-27 22:44:35
52Microprocessors / Institute of Electrical and Electronics Engineers / Intel / Reduced instruction set computing / Multi-core processor / Advanced Micro Devices / Hot Chips / Coprocessor / MIPS Technologies / Computer hardware / Electronic engineering / Computing

Chips Symposium Santa Clara University Santa Clara, California Monday & Tuesday, August 20-21,1990 •

Add to Reading List

Source URL: www.hotchips.org

Language: English - Date: 2013-07-27 22:43:54
53Classes of computers / Instruction set architectures / Microprocessors / Parallel computing / Acorn Computers / Reduced instruction set computing / X86 / Sun Microsystems / Very long instruction word / Computer architecture / Computing / Computer hardware

sunday August 18, 1996 Kresge Auditorium Sunday Tutorial Schedule 7:30 – 8:30

Add to Reading List

Source URL: www.hotchips.org

Language: English - Date: 2013-07-27 22:47:32
54Instruction set architectures / Central processing unit / Classes of computers / Assembly languages / Instruction set / Addressing mode / ARM architecture / Processor register / Reduced instruction set computing / Computer architecture / Computing / Computer engineering

Microsoft PowerPoint - ARMbasics4

Add to Reading List

Source URL: www.ee.ic.ac.uk

Language: English - Date: 2001-10-18 10:48:50
55System V / Unix / MIPS Technologies / Instruction set architectures / MIPS architecture / Application binary interface / UnixWare / Santa Cruz Operation / Reduced instruction set computing / Computer architecture / Computing / System software

SYSTEM V APPLICATION BINARY INTERFACE MIPS RISC Processor Supplement 3rd Edition

Add to Reading List

Source URL: uclibc.org

Language: English
56Instruction set architectures / Assembly languages / Reduced instruction set computing / Executable and Linkable Format / Addition / PA-RISC / Addressing mode / Relocation / Ar / Computing / Computer architecture / Software

Processor-Specific ELF Supplement for PA-RISC Including HP and HP-UX Extensions Version 1.5 August 20, 1998 This document is a supplement to the processor-independent definitions of

Add to Reading List

Source URL: uclibc.org

Language: English - Date: 2012-05-05 03:48:31
57Computer hardware / Instruction set architectures / Classes of computers / Reduced instruction set computing / Assembly language / Instruction set / Embedded system / ARMulator / ARM Holdings / Computer architecture / ARM architecture / Acorn Computers

ARM Software Development Toolkit Version 2.0 Document Number: ARM DUI 0021A Issued: June 1995 Copyright Advanced RISC Machines Ltd (ARM) 1995

Add to Reading List

Source URL: www.ee.ic.ac.uk

Language: English - Date: 1996-03-18 04:05:00
58Microprocessors / MIPS Technologies / Reduced instruction set computing / John Mashey / Intel / Central processing unit / Silicon Graphics / John L. Hennessy / Hot Chips / Computer hardware / Electronic engineering / Computing

セ HOT Chips III Stanford University Palo Alto, California August 26-27, 1991

Add to Reading List

Source URL: www.hotchips.org

Language: English - Date: 2013-07-27 22:44:24
59Instruction set architectures / Classes of computers / Parallel computing / Central processing unit / Reduced instruction set computing / Superscalar / Very long instruction word / X86 / IBM POWER / Computer architecture / Computing / Computer engineering

20 YEARS OF HITS & MISSES David Patterson U.C. Berkeley 1

Add to Reading List

Source URL: www.hotchips.org

Language: English - Date: 2013-07-28 00:06:00
60Instruction set architectures / Central processing unit / DEC Alpha / Microprocessors / Alpha 21064 / VAX / Reduced instruction set computing / Delay slot / Instruction set / Computer architecture / Computing / Computer engineering

Alpha AXP Architecture By Richard L. Sites 1 Abstract

Add to Reading List

Source URL: www.hpl.hp.com

Language: English - Date: 2003-03-18 13:31:58
UPDATE